LXI + PoE: Essential Design Considerations - EDN

2022-06-11 00:31:38 By : Ms. Summer Xia

Introduction to LXI and PoE

LXI is a standard for instrumentation controlled by Ethernet. Once the LXI device is connected to the LAN infrastructure of an organization, the device can be remotely controlled from anywhere on the network, and even offsite through a virtual private network [1]. In terms of physical connection, LXI devices must be able to achieve a data rate of 100Mbps during communication with its link partner, which is compliant with the specification of IEEE 802.3 Type 100BASE-TX [2].

On the other hand, PoE is the implementation of LAN switching infrastructure (i.e., power sourcing equipment or PSE) to provide power (i.e., 48Vdc) to the device connected to it, which means that PoE devices (PDs) are bus powered by PSE through LAN cable [3]. The port pin assignment for PoE with 100Base-T is shown in Figure 1. There are a pair of transmit pins, a pair of receive pins, and four power pins.

Fig. 1. Pin assignment for PoE with 100Base-T

There are four key aspects of hardware realization that require a designer's attention, and which are discussed in subsections A, B, C, and D.

A) DC-DC Converter Selection and Application

The first essential task is to select a DC-DC converter compliant with IEEE 802.3at standard. This DC-DC converter steps down the 48Vdc supplied by PSE to lower power rails needed by the subsystems of the PD. The designer is required to configure the PoE DC-DC converter based on the power loaded by the PD as categorized, where the list of class setting is shown in Figure 2 [6]. For example, for PD's power consumption between 0.44W and 12.95W, DC-DC converter has to be set as Class 0. DC-DC converter like TPS23753 from Texas Instruments has an input port that enables designer to hardwire discrete resistor in order to set the PoE class.

The second key consideration for LXI PoE devices is transient voltage suppression (TVS) protection, where the TVS diode is placed as close as possible to the Ethernet RJ45 connector of the device, as illustrated in Figure 3 [4]. Each data line of the PHY Ethernet transceiver IC is clamped between power rail of the IC and reference ground to protect the IC against the damage due to power surge and electro static discharge (ESD). Overvoltage could happen to the line during hot-plug of the LAN cable with the RJ45 connector of the PD.

However, TVS diode with low parasitic capacitance (i.e., below 1.5pF) shall be chosen for protection of the PD. A higher diode capacitance increases the rise/fall time for signal transition, which would likely fail the LAN connectivity between the PoE device and its link partner. Moreover, the trace that connects the data line and the TVS diode shall be kept as short as possible (i.e., less than 50 mil). A longer trace enlarges the stub effect, which adds extra capacitance to the data line and decreases the edge rate of the signal.

The stub effect is explained in Equation (1), where the resonant frequency (i.e., bandwidth of the transmission line) is inversely proportional to the stub length.

Fig. 3. TVS diode on Ethernet PHY

c = speed of light (1.18×1010 inches/sec)

Electrical isolation of 1500V is another key requirement, as specified in IEC 60950-1:2001 [5]. The RJ45 connector shall have a minimum clearance of 4mm to other circuitry of the PD. Besides that, DC-DC converter and RJ45 connector with 1500V isolation and Ethernet isolation transformer shall be used in PD. The simplified block diagram of the implementation is shown in Figure 4. The electrical isolation is necessary to protect the PD against damage by high voltages due to cable discharge events (CDE) [7].

D) Integrated EMI Filter in RJ45

The RJ45 connector with integrated EMI filter shall be applied in PD. The filter serves as common mode choke to suppress the EMI noise, which is crucial to minimize the radiated emission from the PD, in compliance with the EMI/EMC standard and regulation set by Federal Communications Commission (FCC) in the USA and other regulatory bodies around the world.

LAN 100Base-TX PHY Compliance Test

Upon hardware design completion, the prototype shall pass the LAN 100Base-TX PHY Compliance Test [2]. The PD’s compliance with the LAN 100Base-TX standard guarantees a minimum bit error rate (BER) and robustness of the data communication between the PD and its link partner.

The test setup using oscilloscope DSO91304A installed with Ethernet compliance test software N5392A (from Keysight) is illustrated in Figure 5. The test setup and test flow using N5392A is simple. Once The PD (i.e., device under test) is configured to generate MLT-3 data pattern and the required compliance tests (i.e., peak voltage, overshoot, template, rise/fall time, and DCD/jitter) are selected in N5392A [8], the tests are completed within 15 minutes.

Fig. 5. Test setup for 100Base-TX PHY compliance

Close attention must be given to all the hardware design considerations discussed in this paper in order to ensure the PD's compliance with the standards of electrical, safety, and EMI/EMC.

[1] “The LXI Primer“, LXI Consortium

[2] “LXI Device Specification 2011“, LXI Consortium

[3] “Power over Ethernet (PoE) Power Requirements FAQ“, Cisco

[4] Data sheet: TVS Diode Array, Littelfuse

[6] “Designing with the TPS23753 Powered-Device and Power Supply Controller“, Texas Instruments

[7] AN-1511 Cable Discharge Event, Texas Instruments

[8] “N5392A/N5392B Ethernet Compliance Test Application“, Keysight Technologies

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